1. power consumption包括static和dynamic。static主要是因為leakage current,而dynamic是因為state轉換,因此隨著複雜度昇高

2. 省電技術:

power-saving-tech

frequency scaling: 對clock降頻

clock gating: adds additional logic to a circuit to prune the clock tree,因此F/F的狀態不變,降低dynamic,只剩下static power consumption。用clock gating cell disable某些IP (intellectual property)module。

power gating: 用switch cell disable 某些power domain。意即該domain是完全沒電的

 

3. power domain 是由IP modules組成。例如:

    CPU power domain: Cortex-A8, L1/L2 Cache, ETM, NEON

    LCD power domain: LCD controller, MIE, DSIM

    TV power domain: VP, MIXER, TV Encoder, HDMI

State Retention
Power saving techniques
Result
Clock
Power
Normal F/F
Retention F/F
Frequency scaling
Reduce dynamic power
Enable
Supplied
Keep state
Clock gating
Minimize dynamic power
Disable
Supplied
Keep state
Power gating
Minimize leakage power
Disable
External power supplied, while internally gated
Lose state
Keep state
Power off
Nearly zero power
Disable
externally off
Lose state
Frequencypower-saving-tech

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